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Jared Zerbe, C. Werner, Vladimir Stojanović, F. Chen, J. Wei, G. Tsang, Donggeon Kim, William Stonecypher, A. Ho, T.P. Thrush, Ravi Kollipara, Mark Horowitz, Kevin Donnelly (2003). Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell. IEEE Journal of Solid-State Circuits, 38(12), pp. 2121-2130, DOI: 10.1109/jssc.2003.818572.