Analysis and EOT Scaling on Top- and Double-Gate 2D CVD-Grown Monolayer MoS2 FETs
Abstract
2D layered semiconductors have attracted considerable attention for beyond-Si complementary metal-oxide-semiconductor (CMOS) technologies. They can be prepared into ultrathin channel materials toward ultrascaled device architectures, including double-gate field-effect-transistors (DGFETs). This work presents an experimental analysis of DGFETs constructed from chemical vapor deposition (CVD)-grown monolayer (1L) molybdenum disulfide (MoS2) with atomic layer deposition (ALD) of hafnium oxide (HfO2) high-k gate dielectrics (top and bottom). This extends beyond previous studies of DGFETs based mostly on exfoliated (few-nm thick) MoS2 flakes, and advances toward large-area wafer-scale processing. Here, significant improvements in performance are obtained with DGFETs (i.e., improvements in ON/OFF ratio, ON-state current, sub-threshold swing, etc.) compared to single top-gate FETs. In addition to multi-gate device architectures (e.g., DGFETs), the scaling of the equivalent oxide thickness (EOT) is crucial toward improved electrostatics required for next-generation transistors. However, the impact of EOT scaling on the characteristics of CVD-grown MoS2 DGFETs remains largely unexplored. Thus, this work studies the impact of EOT scaling on subthreshold swing (SS) and gate hysteresis using current-voltage (I-V) measurements with varying sweep rates. The experimental analysis and results elucidate the basic mechanisms responsible for improvements in CVD-grown 1L-MoS2 DGFETs compared to standard top-gate FETs.
