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  5. Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications

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Article
English
2024

Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications

0 Datasets

0 Files

English
2024
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
DOI: 10.1109/vlsitechnologyandcir46783.2024.10631383

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Mark Horowitz
Mark Horowitz

Stanford University

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Kalhan Koul
Maxwell Strange
Jackson Melchert
+18 more

Abstract

Onyx is the first fully programmable accelerator for arbitrary sparse tensor algebra kernels. Unlike prior work, it supports higher-order tensors, multiple inpu

How to cite this publication

Kalhan Koul, Maxwell Strange, Jackson Melchert, Alex Carsello, Yuchen Mei, Olivia Hsu, Taeyoung Kong, Po‐Han Chen, Huifeng Ke, Keyi Zhang, Qiaoyi Liu, Gedeon Nyengele, Akhilesh Balasingam, Jayashree Adivarahan, Ritvik Sharma, Zhouhua Xie, Christopher Torng, Joel Emer, Fredrik Kjølstad, Mark Horowitz, Priyanka Raina (2024). Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications. 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), pp. 1-2, DOI: 10.1109/vlsitechnologyandcir46783.2024.10631383.

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Publication Details

Type

Article

Year

2024

Authors

21

Datasets

0

Total Files

0

Language

English

Journal

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

DOI

10.1109/vlsitechnologyandcir46783.2024.10631383

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