Nanoimprint Lithography for Hybrid Plastic Electronics

The merger of nanoscale devices with flexible, low cost plastics could enable a broad spectrum of electronic and photonic applications, although difficulties in processing plastics at the nanoscale have limited exploration of this potential. Here we describe the use of room temperature nanoimprint lithography for the general fabrication of nanometer- through millimeter-scale patterns on polymer substrates. Specifically, we demonstrate the patterning of arrays of nanoscale source−drain electrode pairs with continuous interconnects to the millimeter length scale, and the fabrication of hundred-nanometer gate features hierarchically patterned over large areas. These patterned plastic substrates have also been used in conjunction with semiconductor nanowires to assemble field-effect transistors.