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  5. Circuits and techniques for high-resolution measurement of on-chip power supply noise

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Article
English
2005

Circuits and techniques for high-resolution measurement of on-chip power supply noise

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English
2005
IEEE Journal of Solid-State Circuits
Vol 40 (4)
DOI: 10.1109/jssc.2004.842853

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Mark Horowitz
Mark Horowitz

Stanford University

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E. Alon
Vladimir Stojanović
Mark Horowitz

Abstract

This paper presents a technique for characterizing the statistical properties and spectrum of power supply noise using only two on-chip low-throughput samplers. The samplers utilize a voltage-controlled oscillator to perform high-resolution analog-to-digital conversion with minimal hardware. The measurement system is implemented in a 0.13-/spl mu/m process along with a high-speed link transceiver. Measured results from this chip validate the accuracy of the measurement system and elucidate several aspects of power supply noise, including its cyclostationary nature.

How to cite this publication

E. Alon, Vladimir Stojanović, Mark Horowitz (2005). Circuits and techniques for high-resolution measurement of on-chip power supply noise. IEEE Journal of Solid-State Circuits, 40(4), pp. 820-828, DOI: 10.1109/jssc.2004.842853.

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Publication Details

Type

Article

Year

2005

Authors

3

Datasets

0

Total Files

0

Language

English

Journal

IEEE Journal of Solid-State Circuits

DOI

10.1109/jssc.2004.842853

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