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Get Free AccessThe architecture of a coarse-grained reconfigurable array (CGRA) processing element (PE) has a significant effect on the performance and energy efficiency of an application running on the CGRA. This paper presents an automated approach for generating specialized PE architectures for an application or an application domain. Frequent subgraphs mined from a set of applications are merged to form a PE architecture specialized to that application domain. For the image processing and machine learning domains, we generate specialized PEs that are up to 10.5x more energy efficient and consume 9.1x less area than a baseline PE.
Jackson Melchert, Kathleen Feng, Caleb Donovick, Ross Daly, Clark Barrett, Mark Horowitz, Pat Hanrahan, Priyanka Raina (2021). Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis. arXiv (Cornell University), DOI: 10.48550/arxiv.2104.14155.
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Type
Preprint
Year
2021
Authors
8
Datasets
0
Total Files
0
Language
English
Journal
arXiv (Cornell University)
DOI
10.48550/arxiv.2104.14155
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